Learning Verilog for FPGA Development
With Eduardo Corpeño
Liked by 6,346 users
Duration: 2h 2m
Skill level: Intermediate
Released: 2/18/2020
Course details
FPGA development requires a big switch from more typical programming processes. In order to get an FPGA-based embedded system up and running, developers must add a hardware description language to their repertoire. In this course, Eduardo Corpeño helps you learn the fundamentals of one such language: the popular and concise Verilog. Eduardo begins with the basics; he explains what a hardware description language is and some similarities to traditional programming languages. He then covers the basic syntax of Verilog, as well as how to create test bench modules to run simulations, use variables with operators as an advantage of the behavioral level of abstraction, and more. Along the way, he provides demos and programming challenges that allow you to put your new skills to the test.
Skills you’ll gain
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Contents
What’s included
- Practice while you learn 1 exercise file
- Learn on the go Access on tablet and phone
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